翻訳と辞書
Words near each other
・ Infinity War
・ Infinity Ward
・ Infinity Watch
・ Infinity Within
・ Infinity's Shore
・ Infinity, Inc.
・ Infinity-Borel set
・ Infinity-Man
・ InfinityDB
・ InFiné
・ Infirmary (Gainesville, Florida)
・ Infitah
・ Infitec
・ INFITT
・ Infix
InfiniteReality
・ Infinitesimal
・ Infinitesimal character
・ Infinitesimal generator
・ Infinitesimal generator (stochastic processes)
・ Infinitesimal strain theory
・ Infinitesimal transformation
・ Infinitheatre
・ Infiniti
・ Infiniti (album)
・ Infiniti (Medea)
・ Infiniti Emerg-e
・ Infiniti Essence
・ Infiniti Etherea
・ Infiniti EX


Dictionary Lists
翻訳と辞書 辞書検索 [ 開発暫定版 ]
スポンサード リンク

InfiniteReality : ウィキペディア英語版
InfiniteReality
InfiniteReality refers to a 3D graphics hardware architecture and a family of graphics systems that implemented the aforementioned hardware architecture that was developed and manufactured by Silicon Graphics from 1996 to 2005. The InfiniteReality was positioned as Silicon Graphics' high-end visualization hardware for their MIPS/IRIX platform and was used exclusively in their Onyx family of visualization systems, which are sometimes referred to as "graphics supercomputers" or "visualization supercomputers". The InfiniteReality was marketed to and used by large organizations such as companies and universities that are involved in computer simulation, digital content creation, engineering and research.
== InfiniteReality ==

The InfiniteReality was introduced in early 1996 and was used in the Silicon Graphics Onyx. It succeeded the RealityEngine, although the RealityEngine coexisted with the InfiniteReality for some time for the Onyx as an entry-level option for deskside "workstation" configurations.
The InfiniteReality architecture was a third-generation design and is categorized as a sort-middle architecture. It was designed to render complex scenes in high-quality at 60 frames per second, roughly two to four times the performance of the RealityEngine it replaces. It was designed explicitly for use in conjunction with the OpenGL graphics library and implements most of the OpenGL pipeline in hardware.
The implementation is partitioned into Geometry (also known as the Geometry Engine), Raster Memory (also known as the Raster Manager) and Display Generator boards, with each board corresponding to each stage of the three major stages in the architecture's pipeline. The board set partitioning scheme is the same as the RealityEngine, as a result of Silicon Graphics wanting the RealityEngine to be easily upgradable to the InfiniteReality. Each pipeline consists of one Geometry Engine board, one, two or four Raster Manager boards and one Display Generator board.〔John S. Montrym et al. "InfiniteReality: A Real-Time Graphics System". ACM SIGGRAPH.〕
The implementation comprises twelve ASIC designs fabricated in 0.5 and 0.35 micrometre processes with three layers of metal interconnect.〔 These ASICs require a 3.3 V power supply. An InfiniteReality pipeline in a maximal configuration contains 251 million transistors. The InfiniteReality was developed by 55 engineers.〔 John Montrym, Brian McClendon. "InfiniteReality Graphics - Power Through Complexity". Advanced Systems Division, Silicon Graphics, Inc.〕
Given a system capable enough, such as certain models of the Onyx2 and Onyx 3000, up to 16 InfiniteReality pipelines can be hosted. The pipelines can be operated in three modes: multi-seat, multi-display and multi-pipe. In multi-seat mode, each pipeline can serve up to eight simultaneous users, each with their own separate displays, keyboards and mice. In multi-display mode, multiple outputs drive multiple displays, which is useful for virtual reality. The multi-pipe mode has two methods of operation. The first method requires a digital multiplexer (DPLEX) daughterboard to be installed in every pipeline, which combines the output of multiple pipelines. The second method uses MonsterMode software to distribute the data used to render a frame to multiple pipelines.
To interface the pipeline to the system, a Flat Cable Interface (FCI) cable is used to connect the Host Interface Processor ASIC on the Geometry Board to the Ibus on the IO4 board, a part of the host system.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
ウィキペディアで「InfiniteReality」の詳細全文を読む



スポンサード リンク
翻訳と辞書 : 翻訳のためのインターネットリソース

Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.