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64-bit : ウィキペディア英語版
64-bit computing

In computer architecture, 64-bit computing is the use of processors that have datapath widths, integer size, and memory address widths of 64 bits (eight octets). Also, 64-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. From the software perspective, 64-bit computing means the use of code with 64-bit virtual memory addresses.
The term ''64-bit'' describes a generation of computers in which 64-bit processors are the norm. 64 bits is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have been used in supercomputers since the 1970s (Cray-1, 1975) and in RISC-based workstations and servers since the early 1990s, notably the MIPS R4000, R8000, and R10000, the DEC Alpha, the Sun UltraSPARC, and the IBM RS64 and POWER3 and later POWER microprocessors. In 2001, NEC released a 64 bit RISC CPU for mobile devices, notably the low cost Casio BE-300.〔http://pdadb.net/index.php?m=cpu&id=m4131&c=nec_vr4131〕〔http://pdadb.net/index.php?m=specs&id=259&c=casio_be-300_pocket_manager〕 In 2003, 64-bit CPUs were introduced to the (previously 32-bit) mainstream personal computer arena in the form of the x86-64 and 64-bit PowerPC processor architectures and in 2012 even into the ARM architecture targeting smartphones and tablet computers, first sold on September 20, 2013, in the iPhone 5S powered by the ARMv8-A Apple A7 SoC.
A 64-bit register can store 264 (over 18 quintillion or 1.8×1019) different values. Hence, a processor with 64-bit memory addresses can directly access 264 bytes (=16 exbibytes) of byte-addressable memory.
Without further qualification, a ''64-bit computer architecture'' generally has integer and addressing registers that are 64 bits wide, allowing direct support for 64-bit data types and addresses. However, a CPU might have external data buses or address buses with different sizes from the registers, even larger (the 32-bit Pentium had a 64-bit data bus, for instance). The term may also refer to the size of low-level data types, such as 64-bit floating-point numbers.
==Architectural implications==
Processor registers are typically divided into several groups: ''integer'', ''floating-point'', ''SIMD'', ''control'', and often special registers for address arithmetic which may have various uses and names such as ''address'', ''index'' or ''base registers''. However, in modern designs, these functions are often performed by more general purpose ''integer'' registers. In most processors, only integer or address-registers can be used to address data in memory; the other types of registers cannot. The size of these registers therefore normally limits the amount of directly addressable memory, even if there are registers, such as floating-point registers, that are wider.
Most high performance 32-bit and 64-bit processors (some notable exceptions are older or embedded ARM and 32-bit MIPS CPUs) have integrated floating point hardware, which is often, but not always, based on 64-bit units of data. For example, although the x86/x87 architecture has instructions capable of loading and storing 64-bit (and 32-bit) floating-point values in memory, the internal floating point data and register format is 80 bits wide, while the general-purpose registers are 32 bits wide. In contrast, the 64-bit Alpha family uses a 64-bit floating-point data and register format (as well as 64-bit integer registers).

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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