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ZX8301
The ZX8301 was a ULA integrated circuit designed for the Sinclair QL microcomputer. Also known as the "Master Chip", it provided a Video Display Generator, the division of a 15 MHz crystal to provide the 7.5 MHz system clock, ZX8302 register address decoder, DRAM refresh and bus controller. The ZX8301 was IC22 on the QL motherboard.
The Sinclair Research business model had always been to work toward a maximum performance to price ratio (as was evidenced by the keyboard mechanisms in the QL and earlier Sinclair models). Unfortunately this focus on price and performance often resulted in cost cutting in the design and build of Sinclair's machines. One such cost driven decision (failing to use a hardware buffer IC between the IC pins and the external RGB monitor connection) caused the ZX8301 to quickly develop a reputation for being fragile and easy to damage, particularly if the monitor plug was inserted or removed while the QL was powered up. Such an action resulted in damage to the video circuitry with the ZX8301 almost always requiring replacing.
The ZX8301, when subsequently used in the ICL One Per Desk featured hardware buffering, and the chip proved to be much more reliable in this configuration.
==External links==
* http://www.worldofspectrum.org/qlfaq/Hardware
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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