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・ SCORE Lites
・ Score Media
・ Score Productions
・ Score Ridge
・ SCORE Stock Mini
・ Score test
・ Score to a New Beginning
・ Score with the Scaffold
・ Score! A Concert Celebrating Music Composed for Television
・ Score! Classic Goals
・ SCORE! Educational Centers
・ SCORE! Mountain
・ ScoreBig
・ Scoreboard
・ Scoreboard (TV series)
Scoreboarding
・ Scorecard
・ Scorecard of A. E. J. Collins
・ Scorecloud
・ ScoreGolf
・ Scoreiu River
・ Scoreloop
・ Scoreni
・ Scorer's function
・ Scores
・ Scores (album)
・ Scores (computer virus)
・ Scores (restaurant)
・ Scores New York
・ Scores on the doors


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Scoreboarding : ウィキペディア英語版
Scoreboarding
Scoreboarding is a centralized method, used in the CDC 6600 computer, for dynamically scheduling a pipeline so that the instructions can execute out of order when there are no conflicts and the hardware is available. In a scoreboard, the data dependencies of every instruction are logged. Instructions are released only when the scoreboard determines that there are no conflicts with previously issued and incomplete instructions. If an instruction is stalled because it is unsafe to continue, the scoreboard monitors the flow of executing instructions until all dependencies have been resolved before the stalled instruction is issued.
== Stages ==
Instructions are decoded in order and go through the following four stages.
# Issue: The system checks which registers will be read and written by this instruction. This information is remembered as it will be needed in the following stages. In order to avoid output dependencies (WAW - Write after Write) the instruction is stalled until instructions intending to write to the same register are completed. The instruction is also stalled when required functional units are currently busy.
# Read operands: After an instruction has been issued and correctly allocated to the required hardware module, the instruction waits until all operands become available. This procedure resolves read dependencies (RAW - Read after Write) because registers which are intended to be written by another instruction are not considered ''available'' until they are actually written.
# Execution: When all operands have been fetched, the functional unit starts its execution. After the result is ready, the scoreboard is notified.
# Write Result: In this stage the result is about to be written to its destination register. However, this operation is delayed until earlier instructions—which intend to read registers this instruction wants to write to—have completed their ''read operands'' stage. This way, so called data dependencies (WAR - Write after Read) can be addressed.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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